![]() MULTI-CHANNEL SAMPLING SPEED CONVERTER.
专利摘要:
公开号:BE1020779A3 申请号:E201200137 申请日:2012-03-02 公开日:2014-05-06 发明作者:Cedric Melange 申请人:Televic Conference Nv; IPC主号:
专利说明:
Multichannel sampling rate converter Field of the invention The present invention relates to the field of apparatus and methods for converting the sampling rate of digital data streams, in particular of audio or video streams. BACKGROUND OF THE INVENTION Digital sampling of analog signals such as audio signals or video signals is generally known. During the processing of the sampled signals, it is often desirable to mix sampled data at different sampling rates. For example, when different audio input and playback devices, each with its own independent sampling rate, are connected to an audio processing device as shown in FIG. 1, a certain synchronization and resampling of the audio streams must be performed by the audio processing unit. Therefore, the audio processing unit must be capable of setting the sampling rate at which the sampled signal is converted from a first sampling rate to a second sampling rate. FIG. 2 shows the general structure of an (asynchronous) audio re-sampler / synchronizer according to the prior art. In addition to an input buffer, two main building blocks can be noted. A FIR (Finite Impulse Response) filter with coefficient generator can delay the audio stream (phase shift) by a certain amount determined by the information from the filter phase input. The second building block is the digital servo loop. This is a feedback loop control loop that attempts to eliminate the difference between the input and output sampling phases by controlling the delay of the FIR filter. However, when multi-channel applications are implemented, the prior art solutions have the major disadvantage that each separate data stream requires its own full Synchronizer. Patent application US2011 / 211658 describes a solution for performing digital multi-channel decoding of a composite BTCS audio signal (Broadcast Television System Committee). Each subsequent stage of the digital multi-channel decoding process is performed at the lowest sampling rate that gives acceptable results for that stage. First, analog to digital conversion of the composite audio signal is performed to create a composite digital audio signal. After analog-digital conversion, all signal processing can be performed in the digital domain. The composite digital audio signal is digitally filtered to perform frequency compensation for variations caused by previous processing stages, including IF demodulation. Demodulating and filtering digital channels is performed to isolate separate channels from the composite digital audio signal. Summary of the invention It is an object of embodiments of the present invention to provide a sampling rate converter that can be shared by independent input data streams with a different sampling rate. The above object is achieved by a sampling rate conversion system according to the present invention. The system..... for sampling rate conversion of an input stream of digital data from a plurality of input streams sampled at a different input rate to obtain an output stream with an output sampling rate comprises - storage means for storing input samples of the plurality of input streams, - control means adapted to receive activation signals received with respect to the input streams and to produce an indication of sampling times for the output stream at the output sampling rate, - resampling means adapted to receive input samples from the storage means and to filter the received input samples with an adaptive set of filter coefficients to extract an output stream produce at an output speed. The system is characterized in that it comprises a selection means adapted to receive the activation signal with respect to the input streams, to select from the input streams an input stream whose sampling rate is to be converted, said selection means being arranged to produce a signal which is indicative of the selected input stream and to generate signals for selecting the corresponding indication of sampling times so that filter coefficients can be created to perform resampling in the aforementioned reminder means. Thanks to the selection means, different input flows can be treated with different input speeds. The selection means includes the necessary circuits for executing an algorithm to decide which data stream is treated next and for exporting the signal required to obtain the information to perform the sampling rate conversion for the selected input data stream. More specifically, an indication is needed of the sampling times for the output stream with the output sampling rate to effect the actual conversion of the sampling rate. In a preferred embodiment, the storage means comprise separate buffer means per input stream. The signal indicative of the selected input stream preferably includes an indication of a start address for storing samples of the selected stream in the storage means. In one embodiment, the system includes locking means to lock the indication of sampling times during a filtering operation. In this way, further incoming activation signals must wait before being handled by the selection means until an ongoing filtering operation is completed. The resampling means preferably comprises a coefficient generator adapted to receive the signal indicative of the selected input stream and the sampling times. The coefficient generator block is preferably adapted to adjust the filter bandwidth. This can be advantageous, e.g. to prevent aliasing when a downsampling operation is to be performed. In another embodiment, the system includes an additional filter to perform a pre-filtering operation on the input samples from the storage means before they are applied to the resampling means. This is an alternative to changing the filter bandwidth. In an embodiment of the invention, the control means comprise a separate control block per different input speed. In a preferred embodiment, the selection means is adapted to act on the input flows on the basis of the "first come, first served" principle. Other algorithms for deciding what the next input data stream will be whose sampling rate is to be converted are also conceivable. Examples include, but are not limited to, Round Robin algorithms, random, fastest sampling rate first, ... In a specific embodiment of the invention, the number of different sampling rates of the multiple number of input streams is 2. If the output speed can assume the same two sampling rate values as the sampling rate of the input, an advantageous design can also be obtained with a single control means is shared by the two input data streams. In a preferred embodiment, the selection means is oriented to produce a filter enable signal to the resampling means. The invention also relates to a participant unit of a digital conference system, comprising a system as described in the foregoing. To summarize the invention and the realized advantages over the prior art, certain objects and advantages of the invention have been described above. It goes without saying that all such objectives or advantages are not necessarily achieved in accordance with a specific embodiment of the invention. Thus, for example, persons skilled in the art will recognize that the invention may be embodied or embodied in a manner that achieves or optimizes one advantage or group of benefits as described herein, without necessarily realizing other goals or benefits described or suggested herein. . The above and other aspects of the invention will become clear and further explained with reference to the embodiment (s) described below. Brief description of the drawings The invention will now be further described, by way of example, with reference to the accompanying drawings, in which: FIG. 1 represents a typical scenario where there is a need for sampling rate conversion. FIG. 2 represents a resampling arrangement as known in the art. FIG. 3 represents an architecture of an energy-efficient multi-channel audio synchronizer according to an embodiment of the present invention. FIG. 4 represents a centralized conference system where there is a need for bi-directional asynchronous sampling rate converters. FIG. 5 represents a specific embodiment of the invention illustrating an architecture of an energy efficient multichannel bidirectional audio synchronizer. Detailed description of illustrative embodiments The present invention will be described with reference to specific embodiments and with reference to certain drawings, but the invention is not limited thereto, but is only limited by the claims. Moreover, the terms first, second, etc. are used in the description and in the claims to distinguish between similar elements and not necessarily for describing a sequence, either in time, in space, in importance or in any other way. It is to be understood that the terms used are interchangeable under proper conditions and that the embodiments of the invention described herein are capable of operating in sequences other than those described or illustrated herein. It is to be noted that the term "comprising" as used in the claims should not be interpreted as being limited to the means specified thereafter; it does not exclude other elements or steps. It must therefore be interpreted as a specification of the presence of the listed features, units, steps or components referred to, but it does not exclude the presence or addition of one or more other features, units, steps or components or groups thereof. Therefore, the scope of the expression "a device comprising means A and B" should not be limited to devices consisting only of parts A and B. It means that with regard to the present invention, the only relevant parts of the device A and B to be. References in this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or feature described in connection with the embodiment is included in at least one embodiment of the present invention. Statements of the phrase "in one embodiment" or "in an embodiment" at different places in this specification do not necessarily all refer to the same embodiment, but it is possible. Furthermore, the specific features, structures or characteristics may be combined in any suitable manner in one or more embodiments, as will be apparent to those skilled in the art from this disclosure. In a similar manner, it should be noted that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped into a single embodiment, figure, or description thereof to streamline the disclosure and understanding of one or more of the facilitate various inventive aspects. However, this method of disclosure should not be interpreted as an expression of an intention that the claimed invention requires more features than expressly stated in each claim. As shown in the following claims, the inventive aspects lie in less than all the features of a single preceding disclosed embodiment. Therefore, the claims that follow the detailed description are hereby explicitly included in this detailed description, wherein each claim stands on its own as a separate embodiment of the present invention. In addition, since some embodiments described herein include some, but not other, features included in other embodiments, combinations of features of different embodiments are intended to fall within the scope of the invention and to form different embodiments, such as will be understood by someone skilled in this field. For example, in the following claims, any of the claimed embodiments can be used in any combination. It should be noted that the use of particular terminology in describing certain aspects of the invention does not imply that the terminology herein is redefined to be limited to any specific features of the features or aspects of the invention with which that terminology is associated. In the description given here, numerous specific details are set forth. However, it is understood that embodiments of the invention can be worked out without these specific details. In other cases, well-known methods, structures and techniques were not shown in detail in order not to obstruct the understanding of this description. The present invention proposes a sampling rate conversion system with an architecture comprising a shared memory block, a shared FIR (Finite Impulse Response) filter to perform the resampling and a selection means, also referred to below as an arbitrator. FIG. 3 illustrates a first possible implementation of the multi-channel sampling rate conversion system according to the invention. In addition to a shared buffer memory (3) and FIR filter (7), the embodiment of FIG. 3 an arbitrator (9) who works according to the "first come, first served" principle. As a control means, a separate digital servo loop (5) is provided per audio stream. The buffer memory can either be implemented as an external storage means or can be integrated to form a single audio synchronization device. The common input buffer (3) is divided into N regions (where N is the number of audio streams to be synchronized) that each start at a stream base address. Each area is used as a circular buffer for the input audio samples. In the embodiment shown in FIG. 3, the activation signal comprises a signal for read admission and a signal for write admission per stream. Each synchronization operation is started by activating a read permission of a stream. Depending on the time of arrival of the different read-admission signals, the arbitrator (9) assigns the shared synchronizer blocks to a - defined active current, using the "first come, first served" principle. This is the simplest way of arbitrage, but of course other forms of arbitration can be implemented to select the active stream. The digital servo loops are not controlled by the arbitrator and continuously produce their current reading position and current filtering phase based on the output signals for write and read admission. In more general terms, the digital servo loops produce an indication of the position in the input stream corresponding to the current output sampling time. This position has a higher resolution than the input sampling clock and in the illustrated embodiment, this quantity is conveniently formatted as a sampling phase. The arbitrator activates the FIR filter whenever it receives a read-admission signal from an output stream. When different read admission signals follow too closely together before the filter can complete the processing of the requested sample, the read admission signals are delayed by the arbitrator so that all requests are processed correctly one after the other. This mechanism serves as a planner. To avoid further problems If a second signal for read admission comes before the filtering operation for resampling, these values can be locked from the moment the arbitrator turns on the FIR filter. Based on the active stream number selected by the arbitrator, reading position and filter phase associated with this active stream are selected by means of a multiplexer. Optionally, the coefficient generator can change the filter bandwidth for this specific active stream, e.g., to prevent aliasing when downsampling is required. An alternative to changing the bandwidth of the resampling filter is pre-filtering for synchronization. When the multiplexers are switched, the arbitrator starts the filtering operation by switching on the FIR filter. The memory address of the input audio samples required by the FIR filter to calculate the current output sample is calculated as the sum of the active current base address (BA) and the circular buffer address of the active current reading position (RP), minus the filter offset (FO). The output of the L-tap FIR filter is recorded as ", where C [x] is the filter coefficients created by the coefficient generator. The advantage of the invented architecture is that a single memory block and infrastructure, as well as the FIR filter and coefficient generator, can be shared among the different audio streams, leading to low energy consumption by the hardware. In the embodiment shown in FIG. 3, an FIR filter is used as a hardware efficient means to interpolate the input stream. However, this hardware block is not limited to this exact type of interpolator. Other interpolation hardware, such as polynomial interpolators, can be used to build the invention. In the special case of bidirectional sampling rate conversion, where one group of channels is synchronized from a certain source frequency f source to a destination frequency Mood and another is synchronized in the opposite direction from Mood to f source, even the controller (implemented as e.g. a servo loop as before) are shared among the two groups. An example of such a situation is a centralized conference system as schematized in FIG. 4. A participant unit must be able to listen to audio coming from a central conference unit sampled at fs, centrally and being reproduced by an audio codec with the local sampling rate fs, the participant and capable of being at the same time to send audio / speech to the central conference unit. To traverse the different clock domains, a bidirectional asynchronous sampling rate converter can be placed in the participant unit and other peripheral units. In FIG. 5, the architecture of such a bidirectional audio synchronizer is shown. The arbitrator here groups all audio streams that need synchronization in one direction. That is, for example, when the read-in signal with sampling rate fs, destination occurs, all audio streams that are converted from fs, source to fs, destination are processed in a sequential and continuous manner. The filtering phase is derived from a single servo loop, noting that the phases of both conversions rotate at the same speed but in the opposite direction. The phase of the second direction φ2 can be derived from the phase of the first direction φα as The active current reading position for both conversion directions can also be determined by a single servo loop. If a sample is omitted in one direction, a sample will have to be duplicated in the other direction and vice versa. For equal nominal sampling rates fSibron and fs, destination, this principle leads to the simple implementation, in Fig. 5. However, the general idea can be extended to any ratio of sampling rates. In another embodiment of the invention, a combination is made of the architectures in Figs. 3 and FIG. 5. The Synchronizer then processes different bidirectional audio streams with a single controller together with a few independent audio streams, each with its own servo loop, with a minimum of hardware costs. Although the invention has been illustrated and described in detail in the drawings and the foregoing description, such illustrations and descriptions are to be considered as illustrative or exemplary and not restrictive. The foregoing description explains certain embodiments of the invention in detail. It should be noted, however, that no matter how detailed the foregoing is contained in the text, the invention can be made in many ways. The invention is not limited to the disclosed embodiments. Other variations on the disclosed embodiments may be understood and performed by persons skilled in the art and by practicing the claimed invention, through a study of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps and the indefinite article "a" does not exclude a plural. A single processor or other unit can perform the functions of different items in the claims. The mere fact that certain measures are listed in mutually different dependent claims does not mean that a combination of those measures cannot be used to benefit. A computer program can be stored / distributed on a suitable medium, such as an optical storage medium or semiconductor medium supplied with or as part of other hardware, but can also be distributed in other forms, such as via the internet or other wired or wireless telecommunication systems. Any references in the claims should not be construed as limiting the scope.
权利要求:
Claims (12) [1] A system (1) for sampling rate conversion of an input stream of digital data from a plurality of input streams sampled at a different input rate to obtain an output stream with an output sampling rate, said system comprising - storage means (3) for storing input samples of the aforementioned multiple number of input streams - control means (5) adapted to receive activation signals (4) with respect to said input streams and to produce an indication (6, 8) of sampling times for said input streams for said output stream - with said output sampling rate, - resampling means ( 7) adapted to receive input samples from said storage means and to filter the received input samples with an adaptive set of filter coefficients to produce said output stream at said output speed, characterized by that the system comprises a selection means (9) adapted to receive said activation signal with respect to said input currents, to select from said input streams an input stream whose sampling rate is to be converted, said selection means being adapted to propagate a signal (10) to indicate indicative of said selected input stream and to generate signals (12) for selecting the corresponding indication of sampling times so that filter coefficients can be created to perform resampling in said resampling means. [2] A sampling rate conversion system according to claim 1, wherein said storage means comprises separate buffer means per input stream. [3] The sampling rate conversion system according to claim 1 or claim 2, wherein said signal indicative of said selected input stream comprises an indication of a start address for storing samples of said selected stream in said storage means. [4] A sampling rate conversion system according to any of claims 1 to 3, comprising locking means for locking said indication of said sampling times during a filtering operation. [5] A sampling rate conversion system according to any of claims 1 to 4, wherein said resampling means comprises a coefficient generator block adapted to receive said signal indicative of said selected input stream and said sampling times. [6] The sampling rate conversion system according to claim 5, wherein said coefficient generator block is adapted to adjust the filter bandwidth. [7] A sampling rate conversion system according to any of claims 1 to 5, comprising an additional filter for performing a pre-filtering operation on the input samples from said storage means before being applied to said re-sampling means. [8] A sampling rate conversion system according to any of the preceding claims, wherein said control means comprises a separate control block per. different input speed. ; . [9] A sampling rate conversion system according to any of the preceding claims, wherein said selection means is adapted to act on said multiple number of input streams according to the "first come, first served" principle. [10] A sampling rate conversion system according to any of the preceding claims, wherein the number of different sampling rates of said multiple number of input streams is 2 and wherein said output rate can assume the same two sampling rates. [11] A sampling rate conversion system according to any of the preceding claims, wherein said selection means (9) is arranged to produce a filter-on signal after said re-sampling means (7). [12] A participant unit of a digital conference system comprising a system according to any one of the preceding claims.
类似技术:
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同族专利:
公开号 | 公开日 HK1185460A1|2014-02-14| EP2608409A1|2013-06-26| WO2013092140A1|2013-06-27| EP2608409B1|2015-04-22|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题 US5986589A|1997-10-31|1999-11-16|Ati Technologies, Inc.|Multi-stream audio sampling rate conversion circuit and method| US7079657B2|2002-02-26|2006-07-18|Broadcom Corporation|System and method of performing digital multi-channel audio signal decoding| US7196642B2|2005-08-24|2007-03-27|Seiko Epson Corporation|Circuitry and method for sampling audio data| US8438036B2|2009-09-03|2013-05-07|Texas Instruments Incorporated|Asynchronous sampling rate converter for audio applications|
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申请号 | 申请日 | 专利标题 EP11194460|2011-12-20| EP20110194460|EP2608409B1|2011-12-20|2011-12-20|Multichannel sample rate converter| 相关专利
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